Status Register Bits in CPU Registers - MCQs with answers

Status Register Bits in CPU Registers - MCQs with answers


1. How many RPO status bits are required for the selection of two register banks?

a. 1
b. 2
c. 8
d.16

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ANSWER: a. 1



2. Which among the below mentioned bits specify the reset status of register in readable format and are usually utilized in sleep mode of PIC?

a. TO
b. PD
c. Both a & b
d. None of the above

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ANSWER: c. Both a & b



3. The RPO status register bit has the potential to determine the effective address of______________

a. Direct Addressing Mode
b. Indirect Addressing Mode
c. Immediate Addressing Mode
d. Indc. Watchdog Timer (WDT)exed Addressing Mode

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ANSWER: a. Direct Addressing Mode



4. Which status bits exhibit carry from lower 4 bits during 8-bit addition and are especially beneficial for BCD addition ?

a. Carry bit (C)
b. Digits Carry bit (DC)
c. Both a & b
d. None of the above

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ANSWER: b. Digits Carry bit (DC)


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