Gated D- latch generates from D-flipflop due to addition of an inverter

Q.  Which circuit is generated from D-flipflop due to addition of an inverter by causing reduction in the number of inputs?
- Published on 19 Oct 15

a. Gated JK- latch
b. Gated SR- latch
c. Gated T- latch
d. Gated D- latch

ANSWER: Gated D- latch

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  • Fel Adrien   -Posted on 25 Jul 20
    Thanks for the support.
    It is much insteresting

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