CMOS NAND & NOR Gates - MCQs with answers

CMOS NAND & NOR Gates - MCQs with answers


Q1. Which statement/s is/are considered to be precise regarding the operational behaviour of MOS transistor?

a. P-channel MOS conducts with negative gate-to-source voltage
b. N-channel MOS conducts with positive gate-to-source voltage
c. Either type of device gets turned with zero gate-to-source voltage
d. All of the above

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ANSWER: d. All of the above



Q2. What is the effect on the power supply voltage due to substantial reduction in the duration of propagation delay and noise margin of CMOS circuit?

a. Power supply voltage increases
b. Power supply voltage decreases
c. Power supply voltage remains stable
d. None of the above

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ANSWER: a. Power supply voltage increases



Q3. How is the configuration strategy of p-type and n-type units in two-input CMOS NAND gate circuit ?

a. Two p-type units in series & two n-type units in parallel
b. Two p-type units in parallel & two n-type units in series
c. Both p-type & n-type units in parallel
d. Both p-type & n-type units in series

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ANSWER: b. Two p-type units in parallel & two n-type units in series



Q4. What is the output level of two -input CMOS NOR gate circuit configuration when all inputs are at low logic level ?

a. High
b. Low
c. Moderate
d. Cannot predict

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ANSWER: a. High


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